pub const a64fx: CpuModel = .{
.name = "a64fx",
.llvm_name = "a64fx",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.arith_bcc_fusion,
.complxnum,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.sve,
.use_postra_scheduler,
.v8_2a,
}),
}pub const ampere1: CpuModel = .{
.name = "ampere1",
.llvm_name = "ampere1",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.alu_lsl_fast,
.arith_bcc_fusion,
.cmp_bcc_fusion,
.fullfp16,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_literals,
.ldp_aligned_only,
.perfmon,
.rand,
.sha3,
.store_pair_suppress,
.stp_aligned_only,
.use_postra_scheduler,
.v8_6a,
}),
}pub const ampere1a: CpuModel = .{
.name = "ampere1a",
.llvm_name = "ampere1a",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.alu_lsl_fast,
.arith_bcc_fusion,
.cmp_bcc_fusion,
.fullfp16,
.fuse_address,
.fuse_addsub_2reg_const1,
.fuse_adrp_add,
.fuse_aes,
.fuse_literals,
.ldp_aligned_only,
.mte,
.perfmon,
.rand,
.sha3,
.sm4,
.store_pair_suppress,
.stp_aligned_only,
.use_postra_scheduler,
.v8_6a,
}),
}pub const ampere1b: CpuModel = .{
.name = "ampere1b",
.llvm_name = "ampere1b",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.alu_lsl_fast,
.arith_bcc_fusion,
.cmp_bcc_fusion,
.cssc,
.enable_select_opt,
.fullfp16,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_literals,
.ldp_aligned_only,
.mte,
.perfmon,
.predictable_select_expensive,
.rand,
.sha3,
.sm4,
.store_pair_suppress,
.stp_aligned_only,
.use_postra_scheduler,
.v8_7a,
}),
}pub const apple_a10: CpuModel = .{
.name = "apple_a10",
.llvm_name = "apple-a10",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.crc,
.disable_latency_sched_heuristic,
.fuse_aes,
.fuse_crypto_eor,
.lor,
.pan,
.perfmon,
.rdm,
.sha2,
.store_pair_suppress,
.v8a,
.vh,
.zcm,
.zcz,
}),
}pub const apple_a11: CpuModel = .{
.name = "apple_a11",
.llvm_name = "apple-a11",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fullfp16,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8_2a,
.zcm,
.zcz,
}),
}pub const apple_a12: CpuModel = .{
.name = "apple_a12",
.llvm_name = "apple-a12",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fullfp16,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8_3a,
.zcm,
.zcz,
}),
}pub const apple_a13: CpuModel = .{
.name = "apple_a13",
.llvm_name = "apple-a13",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fp16fml,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha3,
.store_pair_suppress,
.v8_4a,
.zcm,
.zcz,
}),
}pub const apple_a14: CpuModel = .{
.name = "apple_a14",
.llvm_name = "apple-a14",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.alternate_sextload_cvt_f32_pattern,
.altnzcv,
.arith_bcc_fusion,
.arith_cbz_fusion,
.ccdp,
.disable_latency_sched_heuristic,
.fp16fml,
.fptoint,
.fuse_address,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.perfmon,
.predres,
.sb,
.sha3,
.specrestrict,
.ssbs,
.store_pair_suppress,
.v8_4a,
.zcm,
.zcz,
}),
}pub const apple_a15: CpuModel = .{
.name = "apple_a15",
.llvm_name = "apple-a15",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fp16fml,
.fuse_address,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.perfmon,
.sha3,
.store_pair_suppress,
.v8_6a,
.zcm,
.zcz,
}),
}pub const apple_a16: CpuModel = .{
.name = "apple_a16",
.llvm_name = "apple-a16",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fp16fml,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.hcx,
.perfmon,
.sha3,
.store_pair_suppress,
.v8_6a,
.zcm,
.zcz,
}),
}pub const apple_a17: CpuModel = .{
.name = "apple_a17",
.llvm_name = "apple-a17",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fp16fml,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.hcx,
.perfmon,
.sha3,
.store_pair_suppress,
.v8_6a,
.zcm,
.zcz,
}),
}pub const apple_a7: CpuModel = .{
.name = "apple_a7",
.llvm_name = "apple-a7",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8a,
.zcm,
.zcz,
.zcz_fp_workaround,
}),
}pub const apple_a8: CpuModel = .{
.name = "apple_a8",
.llvm_name = "apple-a8",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8a,
.zcm,
.zcz,
.zcz_fp_workaround,
}),
}pub const apple_a9: CpuModel = .{
.name = "apple_a9",
.llvm_name = "apple-a9",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8a,
.zcm,
.zcz,
.zcz_fp_workaround,
}),
}pub const apple_m1: CpuModel = .{
.name = "apple_m1",
.llvm_name = "apple-m1",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.alternate_sextload_cvt_f32_pattern,
.altnzcv,
.arith_bcc_fusion,
.arith_cbz_fusion,
.ccdp,
.disable_latency_sched_heuristic,
.fp16fml,
.fptoint,
.fuse_address,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.perfmon,
.predres,
.sb,
.sha3,
.specrestrict,
.ssbs,
.store_pair_suppress,
.v8_4a,
.zcm,
.zcz,
}),
}pub const apple_m2: CpuModel = .{
.name = "apple_m2",
.llvm_name = "apple-m2",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fp16fml,
.fuse_address,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.perfmon,
.sha3,
.store_pair_suppress,
.v8_6a,
.zcm,
.zcz,
}),
}pub const apple_m3: CpuModel = .{
.name = "apple_m3",
.llvm_name = "apple-m3",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fp16fml,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.hcx,
.perfmon,
.sha3,
.store_pair_suppress,
.v8_6a,
.zcm,
.zcz,
}),
}pub const apple_m4: CpuModel = .{
.name = "apple_m4",
.llvm_name = "apple-m4",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fp16fml,
.fuse_address,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.perfmon,
.sha3,
.sme2,
.sme_f64f64,
.sme_i16i64,
.v8_7a,
.zcm,
.zcz,
}),
}pub const apple_s4: CpuModel = .{
.name = "apple_s4",
.llvm_name = "apple-s4",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fullfp16,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8_3a,
.zcm,
.zcz,
}),
}pub const apple_s5: CpuModel = .{
.name = "apple_s5",
.llvm_name = "apple-s5",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fullfp16,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8_3a,
.zcm,
.zcz,
}),
}pub const carmel: CpuModel = .{
.name = "carmel",
.llvm_name = "carmel",
.features = featureSet(&[_]Feature{
.aes,
.fullfp16,
.sha2,
.v8_2a,
}),
}pub const cobalt_100: CpuModel = .{
.name = "cobalt_100",
.llvm_name = "cobalt-100",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.sve2_bitperm,
.use_postra_scheduler,
.v9a,
}),
}pub const cortex_a34: CpuModel = .{
.name = "cortex_a34",
.llvm_name = "cortex-a34",
.features = featureSet(&[_]Feature{
.aes,
.crc,
.perfmon,
.sha2,
.v8a,
}),
}pub const cortex_a35: CpuModel = .{
.name = "cortex_a35",
.llvm_name = "cortex-a35",
.features = featureSet(&[_]Feature{
.aes,
.crc,
.perfmon,
.sha2,
.v8a,
}),
}pub const cortex_a510: CpuModel = .{
.name = "cortex_a510",
.llvm_name = "cortex-a510",
.features = featureSet(&[_]Feature{
.bf16,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.sve2_bitperm,
.use_postra_scheduler,
.v9a,
}),
}pub const cortex_a520: CpuModel = .{
.name = "cortex_a520",
.llvm_name = "cortex-a520",
.features = featureSet(&[_]Feature{
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
}pub const cortex_a520ae: CpuModel = .{
.name = "cortex_a520ae",
.llvm_name = "cortex-a520ae",
.features = featureSet(&[_]Feature{
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
}pub const cortex_a53: CpuModel = .{
.name = "cortex_a53",
.llvm_name = "cortex-a53",
.features = featureSet(&[_]Feature{
.aes,
.balance_fp_ops,
.crc,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.sha2,
.use_postra_scheduler,
.v8a,
}),
}pub const cortex_a55: CpuModel = .{
.name = "cortex_a55",
.llvm_name = "cortex-a55",
.features = featureSet(&[_]Feature{
.aes,
.dotprod,
.fullfp16,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.rcpc,
.sha2,
.use_postra_scheduler,
.v8_2a,
}),
}pub const cortex_a57: CpuModel = .{
.name = "cortex_a57",
.llvm_name = "cortex-a57",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.balance_fp_ops,
.crc,
.enable_select_opt,
.fuse_adrp_add,
.fuse_aes,
.fuse_literals,
.perfmon,
.predictable_select_expensive,
.sha2,
.use_postra_scheduler,
.v8a,
}),
}pub const cortex_a65: CpuModel = .{
.name = "cortex_a65",
.llvm_name = "cortex-a65",
.features = featureSet(&[_]Feature{
.aes,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_literals,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.ssbs,
.v8_2a,
}),
}pub const cortex_a65ae: CpuModel = .{
.name = "cortex_a65ae",
.llvm_name = "cortex-a65ae",
.features = featureSet(&[_]Feature{
.aes,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_literals,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.ssbs,
.v8_2a,
}),
}pub const cortex_a710: CpuModel = .{
.name = "cortex_a710",
.llvm_name = "cortex-a710",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.sve2_bitperm,
.use_postra_scheduler,
.v9a,
}),
}pub const cortex_a715: CpuModel = .{
.name = "cortex_a715",
.llvm_name = "cortex-a715",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.spe,
.sve2_bitperm,
.use_postra_scheduler,
.v9a,
}),
}pub const cortex_a72: CpuModel = .{
.name = "cortex_a72",
.llvm_name = "cortex-a72",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.crc,
.enable_select_opt,
.fuse_adrp_add,
.fuse_aes,
.fuse_literals,
.perfmon,
.predictable_select_expensive,
.sha2,
.v8a,
}),
}pub const cortex_a720: CpuModel = .{
.name = "cortex_a720",
.llvm_name = "cortex-a720",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.predictable_select_expensive,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
}pub const cortex_a720ae: CpuModel = .{
.name = "cortex_a720ae",
.llvm_name = "cortex-a720ae",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.predictable_select_expensive,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
}pub const cortex_a725: CpuModel = .{
.name = "cortex_a725",
.llvm_name = "cortex-a725",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.predictable_select_expensive,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
}pub const cortex_a73: CpuModel = .{
.name = "cortex_a73",
.llvm_name = "cortex-a73",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.crc,
.enable_select_opt,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.sha2,
.v8a,
}),
}pub const cortex_a75: CpuModel = .{
.name = "cortex_a75",
.llvm_name = "cortex-a75",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.v8_2a,
}),
}pub const cortex_a76: CpuModel = .{
.name = "cortex_a76",
.llvm_name = "cortex-a76",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.ssbs,
.v8_2a,
}),
}pub const cortex_a76ae: CpuModel = .{
.name = "cortex_a76ae",
.llvm_name = "cortex-a76ae",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.ssbs,
.v8_2a,
}),
}pub const cortex_a77: CpuModel = .{
.name = "cortex_a77",
.llvm_name = "cortex-a77",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.cmp_bcc_fusion,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.ssbs,
.v8_2a,
}),
}pub const cortex_a78: CpuModel = .{
.name = "cortex_a78",
.llvm_name = "cortex-a78",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.cmp_bcc_fusion,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.spe,
.ssbs,
.use_postra_scheduler,
.v8_2a,
}),
}pub const cortex_a78ae: CpuModel = .{
.name = "cortex_a78ae",
.llvm_name = "cortex-a78ae",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.cmp_bcc_fusion,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.spe,
.ssbs,
.use_postra_scheduler,
.v8_2a,
}),
}pub const cortex_a78c: CpuModel = .{
.name = "cortex_a78c",
.llvm_name = "cortex-a78c",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.cmp_bcc_fusion,
.dotprod,
.enable_select_opt,
.flagm,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.pauth,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.spe,
.ssbs,
.use_postra_scheduler,
.v8_2a,
}),
}pub const cortex_r82: CpuModel = .{
.name = "cortex_r82",
.llvm_name = "cortex-r82",
.features = featureSet(&[_]Feature{
.ccdp,
.perfmon,
.predres,
.use_postra_scheduler,
.v8r,
}),
}pub const cortex_r82ae: CpuModel = .{
.name = "cortex_r82ae",
.llvm_name = "cortex-r82ae",
.features = featureSet(&[_]Feature{
.ccdp,
.perfmon,
.predres,
.use_postra_scheduler,
.v8r,
}),
}pub const cortex_x1: CpuModel = .{
.name = "cortex_x1",
.llvm_name = "cortex-x1",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.cmp_bcc_fusion,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.spe,
.ssbs,
.use_postra_scheduler,
.v8_2a,
}),
}pub const cortex_x1c: CpuModel = .{
.name = "cortex_x1c",
.llvm_name = "cortex-x1c",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.cmp_bcc_fusion,
.dotprod,
.enable_select_opt,
.flagm,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.lse2,
.pauth,
.perfmon,
.predictable_select_expensive,
.rcpc_immo,
.sha2,
.spe,
.ssbs,
.use_postra_scheduler,
.v8_2a,
}),
}pub const cortex_x2: CpuModel = .{
.name = "cortex_x2",
.llvm_name = "cortex-x2",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.sve2_bitperm,
.use_postra_scheduler,
.v9a,
}),
}pub const cortex_x3: CpuModel = .{
.name = "cortex_x3",
.llvm_name = "cortex-x3",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.spe,
.sve2_bitperm,
.use_postra_scheduler,
.v9a,
}),
}pub const cortex_x4: CpuModel = .{
.name = "cortex_x4",
.llvm_name = "cortex-x4",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.predictable_select_expensive,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
}pub const cortex_x925: CpuModel = .{
.name = "cortex_x925",
.llvm_name = "cortex-x925",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.predictable_select_expensive,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
}pub const cyclone: CpuModel = .{
.name = "cyclone",
.llvm_name = "cyclone",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8a,
.zcm,
.zcz,
.zcz_fp_workaround,
}),
}pub const emag: CpuModel = .{
.name = "emag",
.llvm_name = null,
.features = featureSet(&[_]Feature{
.crc,
.crypto,
.perfmon,
.v8a,
}),
}pub const exynos_m1: CpuModel = .{
.name = "exynos_m1",
.llvm_name = null,
.features = featureSet(&[_]Feature{
.crc,
.crypto,
.exynos_cheap_as_move,
.force_32bit_jump_tables,
.fuse_aes,
.perfmon,
.slow_misaligned_128store,
.slow_paired_128,
.use_postra_scheduler,
.use_reciprocal_square_root,
.v8a,
}),
}pub const exynos_m2: CpuModel = .{
.name = "exynos_m2",
.llvm_name = null,
.features = featureSet(&[_]Feature{
.crc,
.crypto,
.exynos_cheap_as_move,
.force_32bit_jump_tables,
.fuse_aes,
.perfmon,
.slow_misaligned_128store,
.slow_paired_128,
.use_postra_scheduler,
.v8a,
}),
}pub const exynos_m3: CpuModel = .{
.name = "exynos_m3",
.llvm_name = "exynos-m3",
.features = featureSet(&[_]Feature{
.aes,
.alu_lsl_fast,
.crc,
.exynos_cheap_as_move,
.force_32bit_jump_tables,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_csel,
.fuse_literals,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8a,
}),
}pub const exynos_m4: CpuModel = .{
.name = "exynos_m4",
.llvm_name = "exynos-m4",
.features = featureSet(&[_]Feature{
.aes,
.alu_lsl_fast,
.arith_bcc_fusion,
.arith_cbz_fusion,
.dotprod,
.exynos_cheap_as_move,
.force_32bit_jump_tables,
.fullfp16,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_arith_logic,
.fuse_csel,
.fuse_literals,
.perfmon,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8_2a,
.zcz,
}),
}pub const exynos_m5: CpuModel = .{
.name = "exynos_m5",
.llvm_name = "exynos-m5",
.features = featureSet(&[_]Feature{
.aes,
.alu_lsl_fast,
.arith_bcc_fusion,
.arith_cbz_fusion,
.dotprod,
.exynos_cheap_as_move,
.force_32bit_jump_tables,
.fullfp16,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_arith_logic,
.fuse_csel,
.fuse_literals,
.perfmon,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8_2a,
.zcz,
}),
}pub const falkor: CpuModel = .{
.name = "falkor",
.llvm_name = "falkor",
.features = featureSet(&[_]Feature{
.aes,
.alu_lsl_fast,
.crc,
.perfmon,
.predictable_select_expensive,
.rdm,
.sha2,
.slow_strqro_store,
.store_pair_suppress,
.use_postra_scheduler,
.v8a,
.zcz,
}),
}pub const generic: CpuModel = .{
.name = "generic",
.llvm_name = "generic",
.features = featureSet(&[_]Feature{
.enable_select_opt,
.ete,
.fuse_adrp_add,
.fuse_aes,
.neon,
.use_postra_scheduler,
}),
}pub const grace: CpuModel = .{
.name = "grace",
.llvm_name = "grace",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.rand,
.spe,
.sve2_bitperm,
.use_fixed_over_scalable_if_equal_cost,
.use_postra_scheduler,
.v9a,
}),
}pub const kryo: CpuModel = .{
.name = "kryo",
.llvm_name = "kryo",
.features = featureSet(&[_]Feature{
.aes,
.alu_lsl_fast,
.crc,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8a,
.zcz,
}),
}pub const neoverse_512tvb: CpuModel = .{
.name = "neoverse_512tvb",
.llvm_name = "neoverse-512tvb",
.features = featureSet(&[_]Feature{
.aes,
.alu_lsl_fast,
.bf16,
.ccdp,
.enable_select_opt,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.perfmon,
.predictable_select_expensive,
.rand,
.sha3,
.sm4,
.spe,
.ssbs,
.sve,
.use_postra_scheduler,
.v8_4a,
}),
}pub const neoverse_e1: CpuModel = .{
.name = "neoverse_e1",
.llvm_name = "neoverse-e1",
.features = featureSet(&[_]Feature{
.aes,
.dotprod,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.rcpc,
.sha2,
.ssbs,
.use_postra_scheduler,
.v8_2a,
}),
}pub const neoverse_n1: CpuModel = .{
.name = "neoverse_n1",
.llvm_name = "neoverse-n1",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.spe,
.ssbs,
.use_postra_scheduler,
.v8_2a,
}),
}pub const neoverse_n2: CpuModel = .{
.name = "neoverse_n2",
.llvm_name = "neoverse-n2",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.sve2_bitperm,
.use_postra_scheduler,
.v9a,
}),
}pub const neoverse_n3: CpuModel = .{
.name = "neoverse_n3",
.llvm_name = "neoverse-n3",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.predictable_select_expensive,
.rand,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
}pub const neoverse_v1: CpuModel = .{
.name = "neoverse_v1",
.llvm_name = "neoverse-v1",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.bf16,
.ccdp,
.enable_select_opt,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.no_sve_fp_ld1r,
.perfmon,
.predictable_select_expensive,
.rand,
.sha3,
.sm4,
.spe,
.ssbs,
.sve,
.use_postra_scheduler,
.v8_4a,
}),
}pub const neoverse_v2: CpuModel = .{
.name = "neoverse_v2",
.llvm_name = "neoverse-v2",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.rand,
.spe,
.sve2_bitperm,
.use_fixed_over_scalable_if_equal_cost,
.use_postra_scheduler,
.v9a,
}),
}pub const neoverse_v3: CpuModel = .{
.name = "neoverse_v3",
.llvm_name = "neoverse-v3",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.brbe,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.ls64,
.mte,
.perfmon,
.predictable_select_expensive,
.rand,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
}pub const neoverse_v3ae: CpuModel = .{
.name = "neoverse_v3ae",
.llvm_name = "neoverse-v3ae",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.brbe,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.ls64,
.mte,
.perfmon,
.predictable_select_expensive,
.rand,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
}pub const oryon_1: CpuModel = .{
.name = "oryon_1",
.llvm_name = "oryon-1",
.features = featureSet(&[_]Feature{
.aes,
.enable_select_opt,
.fp16fml,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.rand,
.sha3,
.sm4,
.spe,
.use_postra_scheduler,
.v8_6a,
}),
}pub const saphira: CpuModel = .{
.name = "saphira",
.llvm_name = "saphira",
.features = featureSet(&[_]Feature{
.aes,
.alu_lsl_fast,
.perfmon,
.predictable_select_expensive,
.sha2,
.spe,
.store_pair_suppress,
.use_postra_scheduler,
.v8_4a,
.zcz,
}),
}pub const thunderx: CpuModel = .{
.name = "thunderx",
.llvm_name = "thunderx",
.features = featureSet(&[_]Feature{
.aes,
.crc,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8a,
}),
}pub const thunderx2t99: CpuModel = .{
.name = "thunderx2t99",
.llvm_name = "thunderx2t99",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.arith_bcc_fusion,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8_1a,
}),
}pub const thunderx3t110: CpuModel = .{
.name = "thunderx3t110",
.llvm_name = "thunderx3t110",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.arith_bcc_fusion,
.balance_fp_ops,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.strict_align,
.use_postra_scheduler,
.v8_3a,
}),
}pub const thunderxt81: CpuModel = .{
.name = "thunderxt81",
.llvm_name = "thunderxt81",
.features = featureSet(&[_]Feature{
.aes,
.crc,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8a,
}),
}pub const thunderxt83: CpuModel = .{
.name = "thunderxt83",
.llvm_name = "thunderxt83",
.features = featureSet(&[_]Feature{
.aes,
.crc,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8a,
}),
}pub const thunderxt88: CpuModel = .{
.name = "thunderxt88",
.llvm_name = "thunderxt88",
.features = featureSet(&[_]Feature{
.aes,
.crc,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8a,
}),
}pub const tsv110: CpuModel = .{
.name = "tsv110",
.llvm_name = "tsv110",
.features = featureSet(&[_]Feature{
.aes,
.complxnum,
.dotprod,
.fp16fml,
.fuse_aes,
.jsconv,
.perfmon,
.sha2,
.spe,
.store_pair_suppress,
.use_postra_scheduler,
.v8_2a,
}),
}pub const xgene1: CpuModel = .{
.name = "xgene1",
.llvm_name = null,
.features = featureSet(&[_]Feature{
.perfmon,
.v8a,
}),
}pub const cpu = struct {
pub const a64fx: CpuModel = .{
.name = "a64fx",
.llvm_name = "a64fx",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.arith_bcc_fusion,
.complxnum,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.sve,
.use_postra_scheduler,
.v8_2a,
}),
};
pub const ampere1: CpuModel = .{
.name = "ampere1",
.llvm_name = "ampere1",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.alu_lsl_fast,
.arith_bcc_fusion,
.cmp_bcc_fusion,
.fullfp16,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_literals,
.ldp_aligned_only,
.perfmon,
.rand,
.sha3,
.store_pair_suppress,
.stp_aligned_only,
.use_postra_scheduler,
.v8_6a,
}),
};
pub const ampere1a: CpuModel = .{
.name = "ampere1a",
.llvm_name = "ampere1a",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.alu_lsl_fast,
.arith_bcc_fusion,
.cmp_bcc_fusion,
.fullfp16,
.fuse_address,
.fuse_addsub_2reg_const1,
.fuse_adrp_add,
.fuse_aes,
.fuse_literals,
.ldp_aligned_only,
.mte,
.perfmon,
.rand,
.sha3,
.sm4,
.store_pair_suppress,
.stp_aligned_only,
.use_postra_scheduler,
.v8_6a,
}),
};
pub const ampere1b: CpuModel = .{
.name = "ampere1b",
.llvm_name = "ampere1b",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.alu_lsl_fast,
.arith_bcc_fusion,
.cmp_bcc_fusion,
.cssc,
.enable_select_opt,
.fullfp16,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_literals,
.ldp_aligned_only,
.mte,
.perfmon,
.predictable_select_expensive,
.rand,
.sha3,
.sm4,
.store_pair_suppress,
.stp_aligned_only,
.use_postra_scheduler,
.v8_7a,
}),
};
pub const apple_a10: CpuModel = .{
.name = "apple_a10",
.llvm_name = "apple-a10",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.crc,
.disable_latency_sched_heuristic,
.fuse_aes,
.fuse_crypto_eor,
.lor,
.pan,
.perfmon,
.rdm,
.sha2,
.store_pair_suppress,
.v8a,
.vh,
.zcm,
.zcz,
}),
};
pub const apple_a11: CpuModel = .{
.name = "apple_a11",
.llvm_name = "apple-a11",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fullfp16,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8_2a,
.zcm,
.zcz,
}),
};
pub const apple_a12: CpuModel = .{
.name = "apple_a12",
.llvm_name = "apple-a12",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fullfp16,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8_3a,
.zcm,
.zcz,
}),
};
pub const apple_a13: CpuModel = .{
.name = "apple_a13",
.llvm_name = "apple-a13",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fp16fml,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha3,
.store_pair_suppress,
.v8_4a,
.zcm,
.zcz,
}),
};
pub const apple_a14: CpuModel = .{
.name = "apple_a14",
.llvm_name = "apple-a14",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.alternate_sextload_cvt_f32_pattern,
.altnzcv,
.arith_bcc_fusion,
.arith_cbz_fusion,
.ccdp,
.disable_latency_sched_heuristic,
.fp16fml,
.fptoint,
.fuse_address,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.perfmon,
.predres,
.sb,
.sha3,
.specrestrict,
.ssbs,
.store_pair_suppress,
.v8_4a,
.zcm,
.zcz,
}),
};
pub const apple_a15: CpuModel = .{
.name = "apple_a15",
.llvm_name = "apple-a15",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fp16fml,
.fuse_address,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.perfmon,
.sha3,
.store_pair_suppress,
.v8_6a,
.zcm,
.zcz,
}),
};
pub const apple_a16: CpuModel = .{
.name = "apple_a16",
.llvm_name = "apple-a16",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fp16fml,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.hcx,
.perfmon,
.sha3,
.store_pair_suppress,
.v8_6a,
.zcm,
.zcz,
}),
};
pub const apple_a17: CpuModel = .{
.name = "apple_a17",
.llvm_name = "apple-a17",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fp16fml,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.hcx,
.perfmon,
.sha3,
.store_pair_suppress,
.v8_6a,
.zcm,
.zcz,
}),
};
pub const apple_a7: CpuModel = .{
.name = "apple_a7",
.llvm_name = "apple-a7",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8a,
.zcm,
.zcz,
.zcz_fp_workaround,
}),
};
pub const apple_a8: CpuModel = .{
.name = "apple_a8",
.llvm_name = "apple-a8",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8a,
.zcm,
.zcz,
.zcz_fp_workaround,
}),
};
pub const apple_a9: CpuModel = .{
.name = "apple_a9",
.llvm_name = "apple-a9",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8a,
.zcm,
.zcz,
.zcz_fp_workaround,
}),
};
pub const apple_m1: CpuModel = .{
.name = "apple_m1",
.llvm_name = "apple-m1",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.alternate_sextload_cvt_f32_pattern,
.altnzcv,
.arith_bcc_fusion,
.arith_cbz_fusion,
.ccdp,
.disable_latency_sched_heuristic,
.fp16fml,
.fptoint,
.fuse_address,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.perfmon,
.predres,
.sb,
.sha3,
.specrestrict,
.ssbs,
.store_pair_suppress,
.v8_4a,
.zcm,
.zcz,
}),
};
pub const apple_m2: CpuModel = .{
.name = "apple_m2",
.llvm_name = "apple-m2",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fp16fml,
.fuse_address,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.perfmon,
.sha3,
.store_pair_suppress,
.v8_6a,
.zcm,
.zcz,
}),
};
pub const apple_m3: CpuModel = .{
.name = "apple_m3",
.llvm_name = "apple-m3",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fp16fml,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.hcx,
.perfmon,
.sha3,
.store_pair_suppress,
.v8_6a,
.zcm,
.zcz,
}),
};
pub const apple_m4: CpuModel = .{
.name = "apple_m4",
.llvm_name = "apple-m4",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fp16fml,
.fuse_address,
.fuse_aes,
.fuse_arith_logic,
.fuse_crypto_eor,
.fuse_csel,
.fuse_literals,
.perfmon,
.sha3,
.sme2,
.sme_f64f64,
.sme_i16i64,
.v8_7a,
.zcm,
.zcz,
}),
};
pub const apple_s4: CpuModel = .{
.name = "apple_s4",
.llvm_name = "apple-s4",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fullfp16,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8_3a,
.zcm,
.zcz,
}),
};
pub const apple_s5: CpuModel = .{
.name = "apple_s5",
.llvm_name = "apple-s5",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fullfp16,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8_3a,
.zcm,
.zcz,
}),
};
pub const carmel: CpuModel = .{
.name = "carmel",
.llvm_name = "carmel",
.features = featureSet(&[_]Feature{
.aes,
.fullfp16,
.sha2,
.v8_2a,
}),
};
pub const cobalt_100: CpuModel = .{
.name = "cobalt_100",
.llvm_name = "cobalt-100",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.sve2_bitperm,
.use_postra_scheduler,
.v9a,
}),
};
pub const cortex_a34: CpuModel = .{
.name = "cortex_a34",
.llvm_name = "cortex-a34",
.features = featureSet(&[_]Feature{
.aes,
.crc,
.perfmon,
.sha2,
.v8a,
}),
};
pub const cortex_a35: CpuModel = .{
.name = "cortex_a35",
.llvm_name = "cortex-a35",
.features = featureSet(&[_]Feature{
.aes,
.crc,
.perfmon,
.sha2,
.v8a,
}),
};
pub const cortex_a510: CpuModel = .{
.name = "cortex_a510",
.llvm_name = "cortex-a510",
.features = featureSet(&[_]Feature{
.bf16,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.sve2_bitperm,
.use_postra_scheduler,
.v9a,
}),
};
pub const cortex_a520: CpuModel = .{
.name = "cortex_a520",
.llvm_name = "cortex-a520",
.features = featureSet(&[_]Feature{
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
};
pub const cortex_a520ae: CpuModel = .{
.name = "cortex_a520ae",
.llvm_name = "cortex-a520ae",
.features = featureSet(&[_]Feature{
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
};
pub const cortex_a53: CpuModel = .{
.name = "cortex_a53",
.llvm_name = "cortex-a53",
.features = featureSet(&[_]Feature{
.aes,
.balance_fp_ops,
.crc,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.sha2,
.use_postra_scheduler,
.v8a,
}),
};
pub const cortex_a55: CpuModel = .{
.name = "cortex_a55",
.llvm_name = "cortex-a55",
.features = featureSet(&[_]Feature{
.aes,
.dotprod,
.fullfp16,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.rcpc,
.sha2,
.use_postra_scheduler,
.v8_2a,
}),
};
pub const cortex_a57: CpuModel = .{
.name = "cortex_a57",
.llvm_name = "cortex-a57",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.balance_fp_ops,
.crc,
.enable_select_opt,
.fuse_adrp_add,
.fuse_aes,
.fuse_literals,
.perfmon,
.predictable_select_expensive,
.sha2,
.use_postra_scheduler,
.v8a,
}),
};
pub const cortex_a65: CpuModel = .{
.name = "cortex_a65",
.llvm_name = "cortex-a65",
.features = featureSet(&[_]Feature{
.aes,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_literals,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.ssbs,
.v8_2a,
}),
};
pub const cortex_a65ae: CpuModel = .{
.name = "cortex_a65ae",
.llvm_name = "cortex-a65ae",
.features = featureSet(&[_]Feature{
.aes,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_literals,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.ssbs,
.v8_2a,
}),
};
pub const cortex_a710: CpuModel = .{
.name = "cortex_a710",
.llvm_name = "cortex-a710",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.sve2_bitperm,
.use_postra_scheduler,
.v9a,
}),
};
pub const cortex_a715: CpuModel = .{
.name = "cortex_a715",
.llvm_name = "cortex-a715",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.spe,
.sve2_bitperm,
.use_postra_scheduler,
.v9a,
}),
};
pub const cortex_a72: CpuModel = .{
.name = "cortex_a72",
.llvm_name = "cortex-a72",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.crc,
.enable_select_opt,
.fuse_adrp_add,
.fuse_aes,
.fuse_literals,
.perfmon,
.predictable_select_expensive,
.sha2,
.v8a,
}),
};
pub const cortex_a720: CpuModel = .{
.name = "cortex_a720",
.llvm_name = "cortex-a720",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.predictable_select_expensive,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
};
pub const cortex_a720ae: CpuModel = .{
.name = "cortex_a720ae",
.llvm_name = "cortex-a720ae",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.predictable_select_expensive,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
};
pub const cortex_a725: CpuModel = .{
.name = "cortex_a725",
.llvm_name = "cortex-a725",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.predictable_select_expensive,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
};
pub const cortex_a73: CpuModel = .{
.name = "cortex_a73",
.llvm_name = "cortex-a73",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.crc,
.enable_select_opt,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.sha2,
.v8a,
}),
};
pub const cortex_a75: CpuModel = .{
.name = "cortex_a75",
.llvm_name = "cortex-a75",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.v8_2a,
}),
};
pub const cortex_a76: CpuModel = .{
.name = "cortex_a76",
.llvm_name = "cortex-a76",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.ssbs,
.v8_2a,
}),
};
pub const cortex_a76ae: CpuModel = .{
.name = "cortex_a76ae",
.llvm_name = "cortex-a76ae",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.ssbs,
.v8_2a,
}),
};
pub const cortex_a77: CpuModel = .{
.name = "cortex_a77",
.llvm_name = "cortex-a77",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.cmp_bcc_fusion,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.ssbs,
.v8_2a,
}),
};
pub const cortex_a78: CpuModel = .{
.name = "cortex_a78",
.llvm_name = "cortex-a78",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.cmp_bcc_fusion,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.spe,
.ssbs,
.use_postra_scheduler,
.v8_2a,
}),
};
pub const cortex_a78ae: CpuModel = .{
.name = "cortex_a78ae",
.llvm_name = "cortex-a78ae",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.cmp_bcc_fusion,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.spe,
.ssbs,
.use_postra_scheduler,
.v8_2a,
}),
};
pub const cortex_a78c: CpuModel = .{
.name = "cortex_a78c",
.llvm_name = "cortex-a78c",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.cmp_bcc_fusion,
.dotprod,
.enable_select_opt,
.flagm,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.pauth,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.spe,
.ssbs,
.use_postra_scheduler,
.v8_2a,
}),
};
pub const cortex_r82: CpuModel = .{
.name = "cortex_r82",
.llvm_name = "cortex-r82",
.features = featureSet(&[_]Feature{
.ccdp,
.perfmon,
.predres,
.use_postra_scheduler,
.v8r,
}),
};
pub const cortex_r82ae: CpuModel = .{
.name = "cortex_r82ae",
.llvm_name = "cortex-r82ae",
.features = featureSet(&[_]Feature{
.ccdp,
.perfmon,
.predres,
.use_postra_scheduler,
.v8r,
}),
};
pub const cortex_x1: CpuModel = .{
.name = "cortex_x1",
.llvm_name = "cortex-x1",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.cmp_bcc_fusion,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.spe,
.ssbs,
.use_postra_scheduler,
.v8_2a,
}),
};
pub const cortex_x1c: CpuModel = .{
.name = "cortex_x1c",
.llvm_name = "cortex-x1c",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.cmp_bcc_fusion,
.dotprod,
.enable_select_opt,
.flagm,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.lse2,
.pauth,
.perfmon,
.predictable_select_expensive,
.rcpc_immo,
.sha2,
.spe,
.ssbs,
.use_postra_scheduler,
.v8_2a,
}),
};
pub const cortex_x2: CpuModel = .{
.name = "cortex_x2",
.llvm_name = "cortex-x2",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.sve2_bitperm,
.use_postra_scheduler,
.v9a,
}),
};
pub const cortex_x3: CpuModel = .{
.name = "cortex_x3",
.llvm_name = "cortex-x3",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.spe,
.sve2_bitperm,
.use_postra_scheduler,
.v9a,
}),
};
pub const cortex_x4: CpuModel = .{
.name = "cortex_x4",
.llvm_name = "cortex-x4",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.predictable_select_expensive,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
};
pub const cortex_x925: CpuModel = .{
.name = "cortex_x925",
.llvm_name = "cortex-x925",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.predictable_select_expensive,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
};
pub const cyclone: CpuModel = .{
.name = "cyclone",
.llvm_name = "cyclone",
.features = featureSet(&[_]Feature{
.aes,
.alternate_sextload_cvt_f32_pattern,
.arith_bcc_fusion,
.arith_cbz_fusion,
.disable_latency_sched_heuristic,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.sha2,
.store_pair_suppress,
.v8a,
.zcm,
.zcz,
.zcz_fp_workaround,
}),
};
pub const emag: CpuModel = .{
.name = "emag",
.llvm_name = null,
.features = featureSet(&[_]Feature{
.crc,
.crypto,
.perfmon,
.v8a,
}),
};
pub const exynos_m1: CpuModel = .{
.name = "exynos_m1",
.llvm_name = null,
.features = featureSet(&[_]Feature{
.crc,
.crypto,
.exynos_cheap_as_move,
.force_32bit_jump_tables,
.fuse_aes,
.perfmon,
.slow_misaligned_128store,
.slow_paired_128,
.use_postra_scheduler,
.use_reciprocal_square_root,
.v8a,
}),
};
pub const exynos_m2: CpuModel = .{
.name = "exynos_m2",
.llvm_name = null,
.features = featureSet(&[_]Feature{
.crc,
.crypto,
.exynos_cheap_as_move,
.force_32bit_jump_tables,
.fuse_aes,
.perfmon,
.slow_misaligned_128store,
.slow_paired_128,
.use_postra_scheduler,
.v8a,
}),
};
pub const exynos_m3: CpuModel = .{
.name = "exynos_m3",
.llvm_name = "exynos-m3",
.features = featureSet(&[_]Feature{
.aes,
.alu_lsl_fast,
.crc,
.exynos_cheap_as_move,
.force_32bit_jump_tables,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_csel,
.fuse_literals,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8a,
}),
};
pub const exynos_m4: CpuModel = .{
.name = "exynos_m4",
.llvm_name = "exynos-m4",
.features = featureSet(&[_]Feature{
.aes,
.alu_lsl_fast,
.arith_bcc_fusion,
.arith_cbz_fusion,
.dotprod,
.exynos_cheap_as_move,
.force_32bit_jump_tables,
.fullfp16,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_arith_logic,
.fuse_csel,
.fuse_literals,
.perfmon,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8_2a,
.zcz,
}),
};
pub const exynos_m5: CpuModel = .{
.name = "exynos_m5",
.llvm_name = "exynos-m5",
.features = featureSet(&[_]Feature{
.aes,
.alu_lsl_fast,
.arith_bcc_fusion,
.arith_cbz_fusion,
.dotprod,
.exynos_cheap_as_move,
.force_32bit_jump_tables,
.fullfp16,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_arith_logic,
.fuse_csel,
.fuse_literals,
.perfmon,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8_2a,
.zcz,
}),
};
pub const falkor: CpuModel = .{
.name = "falkor",
.llvm_name = "falkor",
.features = featureSet(&[_]Feature{
.aes,
.alu_lsl_fast,
.crc,
.perfmon,
.predictable_select_expensive,
.rdm,
.sha2,
.slow_strqro_store,
.store_pair_suppress,
.use_postra_scheduler,
.v8a,
.zcz,
}),
};
pub const generic: CpuModel = .{
.name = "generic",
.llvm_name = "generic",
.features = featureSet(&[_]Feature{
.enable_select_opt,
.ete,
.fuse_adrp_add,
.fuse_aes,
.neon,
.use_postra_scheduler,
}),
};
pub const grace: CpuModel = .{
.name = "grace",
.llvm_name = "grace",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.rand,
.spe,
.sve2_bitperm,
.use_fixed_over_scalable_if_equal_cost,
.use_postra_scheduler,
.v9a,
}),
};
pub const kryo: CpuModel = .{
.name = "kryo",
.llvm_name = "kryo",
.features = featureSet(&[_]Feature{
.aes,
.alu_lsl_fast,
.crc,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8a,
.zcz,
}),
};
pub const neoverse_512tvb: CpuModel = .{
.name = "neoverse_512tvb",
.llvm_name = "neoverse-512tvb",
.features = featureSet(&[_]Feature{
.aes,
.alu_lsl_fast,
.bf16,
.ccdp,
.enable_select_opt,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.perfmon,
.predictable_select_expensive,
.rand,
.sha3,
.sm4,
.spe,
.ssbs,
.sve,
.use_postra_scheduler,
.v8_4a,
}),
};
pub const neoverse_e1: CpuModel = .{
.name = "neoverse_e1",
.llvm_name = "neoverse-e1",
.features = featureSet(&[_]Feature{
.aes,
.dotprod,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.rcpc,
.sha2,
.ssbs,
.use_postra_scheduler,
.v8_2a,
}),
};
pub const neoverse_n1: CpuModel = .{
.name = "neoverse_n1",
.llvm_name = "neoverse-n1",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.dotprod,
.enable_select_opt,
.fullfp16,
.fuse_adrp_add,
.fuse_aes,
.perfmon,
.predictable_select_expensive,
.rcpc,
.sha2,
.spe,
.ssbs,
.use_postra_scheduler,
.v8_2a,
}),
};
pub const neoverse_n2: CpuModel = .{
.name = "neoverse_n2",
.llvm_name = "neoverse-n2",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.sve2_bitperm,
.use_postra_scheduler,
.v9a,
}),
};
pub const neoverse_n3: CpuModel = .{
.name = "neoverse_n3",
.llvm_name = "neoverse-n3",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.mte,
.perfmon,
.predictable_select_expensive,
.rand,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
};
pub const neoverse_v1: CpuModel = .{
.name = "neoverse_v1",
.llvm_name = "neoverse-v1",
.features = featureSet(&[_]Feature{
.addr_lsl_slow_14,
.aes,
.alu_lsl_fast,
.bf16,
.ccdp,
.enable_select_opt,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.no_sve_fp_ld1r,
.perfmon,
.predictable_select_expensive,
.rand,
.sha3,
.sm4,
.spe,
.ssbs,
.sve,
.use_postra_scheduler,
.v8_4a,
}),
};
pub const neoverse_v2: CpuModel = .{
.name = "neoverse_v2",
.llvm_name = "neoverse-v2",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.bf16,
.cmp_bcc_fusion,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.i8mm,
.mte,
.perfmon,
.predictable_select_expensive,
.rand,
.spe,
.sve2_bitperm,
.use_fixed_over_scalable_if_equal_cost,
.use_postra_scheduler,
.v9a,
}),
};
pub const neoverse_v3: CpuModel = .{
.name = "neoverse_v3",
.llvm_name = "neoverse-v3",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.brbe,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.ls64,
.mte,
.perfmon,
.predictable_select_expensive,
.rand,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
};
pub const neoverse_v3ae: CpuModel = .{
.name = "neoverse_v3ae",
.llvm_name = "neoverse-v3ae",
.features = featureSet(&[_]Feature{
.alu_lsl_fast,
.brbe,
.enable_select_opt,
.ete,
.fp16fml,
.fuse_adrp_add,
.fuse_aes,
.ls64,
.mte,
.perfmon,
.predictable_select_expensive,
.rand,
.spe,
.spe_eef,
.sve2_bitperm,
.use_postra_scheduler,
.v9_2a,
}),
};
pub const oryon_1: CpuModel = .{
.name = "oryon_1",
.llvm_name = "oryon-1",
.features = featureSet(&[_]Feature{
.aes,
.enable_select_opt,
.fp16fml,
.fuse_address,
.fuse_adrp_add,
.fuse_aes,
.fuse_crypto_eor,
.perfmon,
.rand,
.sha3,
.sm4,
.spe,
.use_postra_scheduler,
.v8_6a,
}),
};
pub const saphira: CpuModel = .{
.name = "saphira",
.llvm_name = "saphira",
.features = featureSet(&[_]Feature{
.aes,
.alu_lsl_fast,
.perfmon,
.predictable_select_expensive,
.sha2,
.spe,
.store_pair_suppress,
.use_postra_scheduler,
.v8_4a,
.zcz,
}),
};
pub const thunderx: CpuModel = .{
.name = "thunderx",
.llvm_name = "thunderx",
.features = featureSet(&[_]Feature{
.aes,
.crc,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8a,
}),
};
pub const thunderx2t99: CpuModel = .{
.name = "thunderx2t99",
.llvm_name = "thunderx2t99",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.arith_bcc_fusion,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8_1a,
}),
};
pub const thunderx3t110: CpuModel = .{
.name = "thunderx3t110",
.llvm_name = "thunderx3t110",
.features = featureSet(&[_]Feature{
.aes,
.aggressive_fma,
.arith_bcc_fusion,
.balance_fp_ops,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.strict_align,
.use_postra_scheduler,
.v8_3a,
}),
};
pub const thunderxt81: CpuModel = .{
.name = "thunderxt81",
.llvm_name = "thunderxt81",
.features = featureSet(&[_]Feature{
.aes,
.crc,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8a,
}),
};
pub const thunderxt83: CpuModel = .{
.name = "thunderxt83",
.llvm_name = "thunderxt83",
.features = featureSet(&[_]Feature{
.aes,
.crc,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8a,
}),
};
pub const thunderxt88: CpuModel = .{
.name = "thunderxt88",
.llvm_name = "thunderxt88",
.features = featureSet(&[_]Feature{
.aes,
.crc,
.perfmon,
.predictable_select_expensive,
.sha2,
.store_pair_suppress,
.use_postra_scheduler,
.v8a,
}),
};
pub const tsv110: CpuModel = .{
.name = "tsv110",
.llvm_name = "tsv110",
.features = featureSet(&[_]Feature{
.aes,
.complxnum,
.dotprod,
.fp16fml,
.fuse_aes,
.jsconv,
.perfmon,
.sha2,
.spe,
.store_pair_suppress,
.use_postra_scheduler,
.v8_2a,
}),
};
pub const xgene1: CpuModel = .{
.name = "xgene1",
.llvm_name = null,
.features = featureSet(&[_]Feature{
.perfmon,
.v8a,
}),
};
}